System Verilog (Part - B) - Language Constructs

Value Sets: 

  • 0 (False)
  • 1 (True)
  • X (Don't Care, Unknown logic value)
  • Z (High Impedance value, Open Circuit)
Data types in Verilog (work for System Verilog as well):
  • Reg
    • Store combinational and sequential values.
    • Holds 4 state values (0, 1, X, Z).
    • Assigned in procedural code block.
reg a;
reg [7:0] r1;

  • Wire
    • connects parts of a design.
    • Holds 4 state values.
wire a;
wire [15:0] w;

  • Input, Output, Inout (Wire Type)
    • Declaration of input, output and bidirectional ports of a module.
input a;
output b;
inout c;

  • Int (Integer)
    • Keyword integer, it can be assign with an integer value.
    • They are mainly used for loops - indices, parameters, constants.
int f;
integer f;
assign f=35;

  • Supply0, Supply1
    • Defines wires tied to logic 0 (ground) and logic 1 (power) 
    • These are useful while describing the hardware in terms of transistors.
supply1 pwr;
supply0 gnd;

  • Time
    • Only for simulation purpose and not used for synthesis.
    • It can hold the current simulation time.
time t;
t=$time; //here $time describes the current simulation time in simulation tool.

  • Parameter
    • It allows constants like length of a word to be defined symbolically in a single place which makes it easier to change later on.
parameter WIDTH = 32;
wire [WIDTH-1:0] v;

Data types in System Verilog:
  • An extension of reg type called 'logic' is used.
    • All the logic variables can be written either by one continuous assignment (assign) or by one or more procedural statements (always).
    • Holds 4 state values
    • It cannot be driven with multiple drivers.
  • String
    • It is not synthesizable and can only be used for simulation purpose (to manipulate the string).
    • Supports a large number of inbuilt methods to work with and these are used when you write testbench code for the program.
string s;
  • Always use "logic" in your code and examples to make your life easy.

User defined data types:
  • Enumerations: to define your own datatype.
    • Assigns a symbolic name to each legal value taken by the data type.
    • Example: enum{IDLE, BUSY, ACTIVE} states;
    • Enumerated methods
  • Structures and Unions: to collect different types of data under the same name.
    • Collection of different data types.
    • All members in union shares the same memory space.
  • Typedef: to define your own datatype.
    • Defines user defined identifiers that can be used in place of type specifiers.

Comments and Numbers:
  • Comments
    • One line comments: double slash //
    • Block comments: Enclose comments between the characters /* and */
  • Numbers
    • Integer constants and Real constants.
    • Number storage is defined as the number of bits, but the values can be assigned in decimal, binary, octal or hexadecimal.

e.g. 1>

e.g. 2>


e.g. 3>
int a;
logic [2:0] a;
logic [3:0] a;
logic [1:0] a;